Archive for March, 2016

See you at APEC at Long Beach

Tuesday, March 8th, 2016

The 2016 APEC (Applied Power Electronics Conference) is on again this year from the 20-24 March in Long Beach, California, USA.

We will be there and it would be great to meet.

Education Seminar

We will be presenting a professional education seminar on the Sunday 20th March at 2:30pm and will be at the conference and trade show during the week.

The education seminar covers the practical essentials of Digital Power Electronics Control.  A summary of the presentation is here ELMG APEC 2016 Presentation.

If you haven’t, register for the conference here and let us know if you would like to arrange a meeting during the APEC week.

See you at APEC at Long Beach

ELMG Digital Power FPGA IP Cores

Dr. Tim King, who is responsible for ELMG FPGA and ELMG FPGA IP platforms will also be attending.

See you at APEC at Long Beach

APEC Professional Education Seminar March 20th 2016 2:30 PM

Monday, March 7th, 2016

APEC Professional Education Seminar

High Performance Digital Control For Power Electronics

ELMG Digital Power CTO, Dr Hamish Laird is presenting a APEC Professional Education Seminar at APEC in Long Beach, California March 20th 2016 at 2:30pm in room S11.

Here is the timetable for the APEC Professional Education Seminars.

The Applied Power Electronics Conference (APEC) is one of the best power electronics conferences in the world.  It is attended by power electronics engineers wanting to stay in touch with leading academic research, industry know how and the latest vendor solutions.  APEC focusses strongly on the applied part of its title.  Fitting with this the ELMG Digital Power APEC 2016 Professional Education Seminar provides know how that can be directly applied to converter control.

Dr Laird’s Professional Education Seminar, titled High Performance Digital Control for Power Electronics, is aimed at intermediate level power engineers.  The seminar surveys and details required techniques to successfully implement high performance digital control for power electronic converters.

Presentation Abstract

This presentation, aimed at intermediate level power engineers, surveys and details required techniques to successfully implement digital control for power electronic converters. In turn each component of the controller from digital (PWM and VPO) modulators, compensator pole zero placement, compensator numeric precision issues, single sample noise through to anti-aliasing filter design is covered. Digital pulse width modulators (PWM) and digital variable period oscillators (VPO) have different non-linear frequency response characteristics from equivalent analogue systems. The effect of these differences on the control is discussed and spectral-shaping design methods to improve performance of the digital modulators are presented. The design of the compensator by directly placing the digital poles and zeros is then covered. By translating the pole and zero positions directly into digital filter coefficients for the digital compensator the translation of analogue coefficients to digital is avoided. A method that requires no coding or simulation for determining numeric precision issues in the digital compensator coefficients is then presented. As most systems require integrators the most suitable forms of digital integrators are discussed. The precision issues specific to digital integrators and methods to reduce these are presented in detail. Finally managing single sample errors, which have no analogue equivalent, and the choice of anti-aliasing filters is detailed.


First Ninety minutes

The first ninety minute session of the presentation covers the characteristics and performance of digital PWM and VPO modulators. The main emphasis is where the digital performance is different from analogue where this has impact of the control performance. A number of ways to correct or minimise the “errors” in digital PWM and VPO are then presented and explained. These include dither and spectral management using quantisation correction as shown below. ????(????)=(1−????^(−1))????
The improved performance of the corrected digital PWM and VPO modulators is shown.
Then an alternate to analogue loop design and its translation to digital is introduced. In this method the digital poles and zeros are placed directly in the z domain.

Learning Outcomes

The learning outcomes from the first ninety minutes are

  • An appreciation of the character of digital modulation for power electronics for the two common modulators PWM and VPO.
  • Tools and design approaches to minimise the possible problems in digital modulators for power electronics.
  • Design approaches to maximise the benefit of the digital modulation.
  • An understanding of useful digital pole zero combinations and how they can be used in closing the digital power converter loop.

Second Ninety minutes

In this second ninety minute session the presentation covers the practical issues of implementing the digital control in the processor.
The IIR biquad is introduced as the best and most economical solution to implement controllers given limited processing power. The matching of the previously designed pole and zero positions to the filter coefficients is then presented along with a method to determine the possible numeric precision issues. This method is used on some example implementations.
As integral control is typically always implemented to control a power converter the specific issues associated with digital integrators in digital power electronic control are presented.
Digital integrators can be implemented in a number of different ways so the first part of the integrator discussion covers choosing the best digital integrators. Then the numeric precision issues and the effects they have on the converter control are explained. The method to find the precision issues is again described. Then solutions to these issues are presented.
The effect of single sample errors (which have no equivalent in an analogue control system) on the sampled data system is then detailed. Finally design choices around anti-aliasing filters are then presented. These include cut-off frequency and filter order and the effect these parameters have on the loop performance.

Learning Outcomes

The learning outcomes from the second ninety minute session are

  • How pole zero combinations can be implemented in IIR Biquads and how to choose the number of bits.
  • An appreciation of how to determine if there are digital precision issues in the filters before doing any coding or simulation. An understanding of how to choose the best digital integrator form.
  • An appreciation for the numeric precision issues that arise from integrators, how they determine converter performance.
  • An appreciation of the solutions to numeric precision issues.
  • What single sample noise does in a digital control system.
  • How to design anti-aliasing filters for digitally controlled power converters.

This course material provides all the necessary know how to ensure development of digital control of power electronics proceeds quickly and robustly.

See you in Long Beach on the 20th March 2016 at 2:30pm