Click here to download a fact sheet on Modern power electronic control systems using ELMG Digital Power Control IP Core Blocks.
ELMG’s Space vector PWM core for three-phase systems is an state-of-the-art and compact IP core. It provides standard PWM functionality as well as advanced PWM functionality such as deadtime, deadtime compensation, precision extension and spectral shaping for cutting-edge PWM performance.
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Are you looking for a turnkey solution for a power controller and need to speed the development process to get the product out to meet the market need. Perhaps your current MCU or DSP based product needs to be moved to an FPGA platform. The ELMG FPGA IP core block library may be the solution for you.
ELMG have developed and refined our IP library over the years. We have worked on digital controlled power converters for over twenty five years and have worked with FPGA controlled converters since 1997. Over that time we have refined and developed our know how.
Currently available IP
ELMG can deliver anything from a turnkey solution to a specific IP block to aid you in your development. We can help also with verifying the IP block function.
One of the first questions coming into your mind is why use FPGAs? The first big benefit to using FPGAs is their speed. In ELMG’s systems the sampling rate is at 100ksample/sec or higher. Using a standard MCU approach to achieve these speeds would be almost impossible without significant budget. FPGA are not terribly expensive. Many converters are not high volume so the configurable FPGAs often suit the application. If large volumes are anticipated the FPGA could well be the track to an ASIC design which could reduce your chip cost to near on nothing.
FPGA base controllers are flexible and parameters can easily be changed. As the processing can be implemented in parallel they are excellent in power electronics feedback control where delay is destabilising. ELMG uniqueness is expertise in FPGA, power electronics and control systems. This allows you to leverage verified IP gaining fast access to the markets.
The key advantage in using the ELMG IP core blocks for development is our expertise. We have experts in the fields of FPGA development, power electronics, control systems and compliance. Not only can we design you a compliant stable system we can do it quickly, efficiently and with minimal input from the customer.
We have a few different variants of the standard IIR biquad of varying precision. We have the standard option in both DFT1 and TDFT2 as well as the delta operator filter in TDFT2. This is especially useful for narrow bandwidth filters such as those used in resonant control.
This IP block converts three phase voltages and currents into their two phase (in the αβ domain) equivalents using a power equivalent transform.
This IP block converts voltages and currents from their two phase (in the αβ domain) equivalents to three balanced three phase voltages/currents using a power equivalent transform.
This IP block rotates from the αβ domain to the stationary dq domain.
This IP block rotates from the stationary dq domain back to the αβ domain.
This IP block filters incoming signals through a repetitive filter. A repetitive filter is comb filter with peaks at the fundamental frequency and its harmonics. It is particularly useful for controlling grid-connected systems to reject disturbances caused by higher order harmonics.
This IP block takes in both a demand and a feedback signal and passes the difference through a gain stage in parallel with a scaled repetitive filter. This is the standard control setup we recommend for grid connected systems.
This IP block is a Type II phase-locked loop for locking to the grid frequency. Due to the Type II nature of the loop, it can lock to a wide range of frequencies as well as from any phase offset. This makes it very suitable for operation in products which could expect to be connected both 50Hz and 60Hz grids in their lifetime.
This IP block is a Space-Vector Pulse Width Modulator, which when connected to an inverter is used as a three phase voltage source. The IP block also includes PWM deadtime and deadtime compensation to ensure its accuracy.
This IP block is used to drive an H-bridge to create single phase voltages. The IP block also includes deadtime and deadtime compensation to ensure its accuracy.
This IP block does feedforward linearizer using an arbitrary function. This function can be changed and recompiled.
This block provides the variable frequency duty cycle for resonant converters that are controlled with variable frequency.
Currently we have ADC drivers for a number of ADCs that have suitable conversion times and zero order hold behaviour. We would propose you use these ADCs in your design. If this is not appropriate, we have the expertise to design and verify new ADC drivers.
By connecting these blocks the following systems can be controlled