Archive for March, 2017

Dr. Hamish Laird achieves Xilinx Alliance Program Certification

Wednesday, March 22nd, 2017

Xilinx Alliance Program Certification Commitment

As part of their commitment to the Xilinx Alliance Program Certification ELMG Digital Power CTO and founder, Dr. Hamish Laird has completed Xilinx Certification.

When asked about this Dr Laird said

“As part of ELMG Digital Power’s continuing commitment to Xilinx, the Xilinx Alliance Program and the fantastic technology that Xilinx provides I am excited to complete this training and achieve Certification.  We see great things happening with Xilinx All Programmable FPGAs and Zynq SoCs.  It was great to see the capability of the UltraScale technology and to see the progress and extension of the Vivado Suite.  We are really pleased to continue our Xilinx Alliance Program commitment and are please to be part of the Xilinx community.”

Xilinx Alliance Program Certification certificate for Dr. Hamish Laird

Xilinx Alliance Program Certification

Dr Laird continues

“We are very pleased and proud of our Xilinx Alliance Program membership and for the value that it lets us bring to our customers.   Training for key people in our organization is essential for us to continue to help our customers with FPGA and other All Programmable solutions.  Our IP blocks, power electronics know how and ability to deliver solutions are our key areas of focus.”

Contact ELMGDigitalPower now.

 

Equivalent bits – a question from LinkedIn Group

Friday, March 10th, 2017

“I was looking through ELMG’s tutorial “Three Key Issues to Watch out for in the Digital Control of Power Electronics” (http://www.elmgdigitalpower.com/power-electronics-digital-control-free-report-on-three-key-issues/) and am having some trouble understanding the relationship between frequency, register size, and equivalent bits.

An example given in the “2. Timer Precision” section of the document reads:

‘Consider the case where the timer clock runs at 40MHz. If the variable period oscillator register has 256 bits then the maximum frequency that the VPO can make is 10MHz and the minimum is 39.0625kHz. The example LLC resonant power converter needs a variable frequency of 500kHz to 210kHz to perform the control. This means the VPO count register has a usable range from 80 to 191. This is 111 counts which is 6.8 equivalent bits or almost seven bits.”

Equivalent bits are a great way to look at numeric precision.

Come join the discussion to see how equivalent bits is calculated.  https://www.linkedin.com/groups/6677852/6677852-6242781250545942530

 

 

A question about LCL filter

Wednesday, March 1st, 2017

I’ve got a situation where I have a generator hooked up to a rectifier doing space vector control. The rectifier has an LC filter. Inductor current and cap voltage is measured. The L from the generator makes up the second L. I didn’t put a virtual damper in the fpga code (like I should have) and am trying different things. This is only a prototype so just working is the main thing. Which would be the best way to go in my current situation?

*pole cancellation in the digital controller (in dq and 0 components)
*Adding a physical damping resistor to the filter cap
*increasing filter cap
*removing filter cap (voltage Pll seems to track fine on HIL and simulation but haven’t tried on power hardware)

Sorry about posting too much, but I’m thankful for any suggestions!